ADXL345 Digital Accelerometer
Low-power 3-axis accelerometer with tap/double-tap and freefall detection for wearables.
Wiring & code for
ADXL345 practical reference
A compact, low-power accelerometer used for tilt sensing, tap/double-tap detection, and freefall detection in wearable projects.
Key specifications
- Type: 3-axis MEMS digital accelerometer
- Interface: I2C (up to 400kHz) or SPI (up to 5MHz), selectable via the CS pin
- Measurement range: Selectable ±2g / ±4g / ±8g / ±16g, set via register
- Resolution: 10-bit standard, up to 13-bit in full-resolution mode (~3.9 mg/LSB at full resolution)
- Output data rate: Programmable, 0.1 Hz to 3200 Hz
- Supply voltage: 2.0V–3.6V (breakout modules commonly accept 3.3-5V via onboard regulation)
- Current draw: ~23 µA standby, ~140 µA in measurement mode (typical)
- Built-in features: Tap/double-tap detection, free-fall detection, activity/inactivity detection, 32-sample FIFO buffer
- I2C address: 0x53 default, 0x1D if the ALT ADDRESS pin is pulled HIGH
Pinout and connection notes
CS pin determines the bus mode — this trips people up because it's not obviously a "mode select" pin from the silkscreen. Tie CS to VCC for I2C; if you leave it floating on some breakout revisions, the chip can default to SPI mode and I2C reads will silently fail.
SDO doubles as the I2C address pin — this is the same physical pin used for SPI data output, repurposed in I2C mode as an address selector. Floating or grounding it gives 0x53; pulling it to VCC gives 0x1D. Useful for running two ADXL345s on one I2C bus without a multiplexer.
Full-resolution mode matters for the ±g range you pick — in 10-bit mode, selecting a wider range (±16g) trades away resolution at low-g movements. If fine tilt sensitivity matters, use full-resolution mode, which keeps ~3.9mg/LSB sensitivity regardless of the selected range.
Interrupts save you from polling — tap/double-tap/free-fall detection is computed on-chip; wiring INT1 or INT2 to a GPIO interrupt is far more responsive and power-efficient than continuously polling axis registers and computing thresholds in software.
- VCC: Power, 3.3–5V DC depending on breakout
- GND: Ground
- CS: Chip select — tie HIGH (to VCC) to force I2C mode; drive LOW as part of SPI transactions to use SPI mode
- INT1: Programmable interrupt output 1 (e.g. tap, free-fall, activity events)
- INT2: Programmable interrupt output 2 — can route different event sources than INT1
- SDO / ALT ADDRESS: In I2C mode: pull HIGH for address 0x1D, leave LOW/floating for default 0x53. In SPI mode: serial data output
- SDA: I2C data line (SPI: MOSI/SDI depending on breakout labeling)
- SCL: I2C clock line (SPI: SCK)
Integration checklist
- Confirm the exact part number and breakout-board revision.
- Verify supply voltage, current demand, logic levels, and signal direction against the datasheet.
- Check controller pin assignments and bus address or interface mode against the example code.
- Power up with external loads disconnected, then test signals before full integration.
- If readings or communication fail, check power and ground first, then pin mapping, interface settings, and library initialization.
Troubleshooting and reproducibility
Record the board used, wiring, library/version, supply arrangement, and measured behavior. Use the selected board-specific wiring example as the source of truth. Never assume visually similar modules share identical voltage tolerance or pin order.